The quality intellectual property metric (QIP) is an international standard, developed by Virtual Socket Interface Alliance (VSIA) for measuring IP or SIP (Silicon intellectual property) quality and examining the practices used to design, integrate and support the SIP. SIP hardening is required to facilitate the reuse of IP in integrated circuit design.
Background and Importance
Application is driving the need for higher complexity and performance IP-based System-on-a-chip (SoC) design. One solution is the reuse of high quality IP. IP quality is the key to successful SoC designs, but it is one of the SoC’s most challenging problems.
QIP metric allows both the IP designers and IP integrators to measure the quality of an IP core against a checklist of critical issues.
IP integrators make use of the IP cores into their own design and deliver final integrated circuit for an application, e.g. an integrated circuit designer of iPhone main processor IC (ARM architecture CPU) integrates other IP cores like USB 2.0, DSP, MP4 decoder, etc., so that the additional features of USB 2.0, MP4 decoder, etc. can be easily embedded into the final IC.
The QIP consists of interactive Microsoft Excel spreadsheets with sets of questions to be answered by the IP vendor.
Hong Kong Science and Technology Parks Corporation (HKSTP, which was set up by Hong Kong government) and Hong Kong University of Science and Technology (HKUST) started to develop a SIP verification and quality measures framework in 2005, based on QIP metric. The objective is to develop a technical framework for SIP quality measures and evaluation based on QIP. Third-party SIP evaluation service is provided by HKSTP, so that IP integrators can know the quality of their desired SIP cores.
IC designers have developed their own IC design, and such design can be reused by other IC designers. Other IC designers can reduce their risk of IC design, because such parts of design (IP cores) are proven on the specific Process technology.
But other IC designers do not know the quality of such IP cores provided. IP providers cannot provide the IP cores to other IC designers for evaluation.
HKSTP is the third party between them and can act as a judge body, to evaluate the quality of IP cores of various IP providers, based on the public standard QIP metric.
Other IP designers can know and choose their IP provider, based on the information provided by the third party, HKSTP.
The IP providers can also get the evaluation report and improve the quality of their IP cores.
Soft and hard SIP
There are soft SIP and hard SIP verification and quality measures.
Soft IP comes with design source code in the form of synthesizable HDL (Hardware description language) code (VHDL and Verilog are HDL).
Hard IP is a design macro and model without HDL code available; they are optimized for power, size or performance, and mapped to a specific Process technology. Also refer to SIP hardening.
QIP v2.0 (2005)
QIP v2.02 (2006)
QIP v3.0 (2007)
QIP v4.0 (2007)
