The Namco Pole Position was an arcade system board, which was first used by Namco in 1982 for the Pole Position arcade games; it was one of the first system boards to utilize stereo and quadraphonic sound, and used NVRAM to save its high scores after a machine was turned off. It was also the first arcade system to use 16-bit microprocessors, with two Zilog Z8002 processors. It was the most powerful and expensive arcade system upon release, costing $4200 ($8.12 thousand in 2017). The hardware is capable of pseudo-3D, sprite-scaling.
Board composition: CPU board, video board, audio board
Main CPU: Zilog Z80 @ 3.072 MHzPerformance: 8/16-bit instructions @ 0.445 MIPS (million instructions per second)
Secondary CPU: 2× Zilog Z8002 @ 3.072 MHzPerformance: 16/32-bit instructions @ 1.536 MIPS (0.768 MIPS, 4 cycles per instruction, per CPU)
I/O MCU: Fujitsu MB8843 @ 1.54 MHz & Fujitsu MB8844 @ 1.54 MHzPerformance: 4/8-bit instructions @ 3.08 MIPS (1.54 MIPS, 1 instruction per cycle, per MCU)
Capabilities: Input/output controllers (type 1) handle the controls
Sound CPU: One of the secondary CPU's used for sound, possibly additional Zilog Z80 for sound
Sound chips:Namco 52xx Audio Processor @ 1.536 MHz: 6 PCM wavetable synthesis channels, 4-16-bit audio depth, up to 48 kHz sampling rate, stereo & quadraphonic output
Namco 54xx Audio Generator @ 1.536 MHz: Explosion sound generator, noise generator, 4-channel quadraphonic muxer
2× Fujitsu MB8843 MCU @ 1.54 MHz: 4/8-bit instructions @ 3.08 MIPS, handles speech
GPU chipset: 3× Namco 02xx GFX Shifter (16-bit video shifter), 2× Namco 03xx Playfield Data Buffer, Namco 04xx Sprite Address Generator, Namco 09xx Sprite RAM Buffer
RAM (random-access memory)Z80: 8 KB
Battery back-up NVRAM: 2 KB
Video RAM: 5 KB (2.5 KB SRAM, 2 KB sprite RAM)
Sound RAM: 1 KB
Z8002: 8 KB video RAM (3 KB SRAM, 4 KB sprite RAM)
ROM (read-only memory)Z80: 16 KB
Z8002: 240 KB
Video resolution: 256×224 to 384×264 pixels
Color palette: 4096 (12-bit RGB)
Colors on screen: 3840
Graphical planes: 2 tilemap layers (1 background, 1 text), 1 road layerTile size: 8×8 pixels
Colors per tile: 3
Scrolling: Horizontal and vertical
Sprite capabilities: Line buffers, vertical position buffer, sprite-scaling, sprite flipping, mid-frame palette swapColors per sprite: 16 (4-bit)
Sprite sizes: 16×16 (64 bytes) and 32×32 (256 bytes)
Sprite RAM: 6 KB
Sprites on screen: 24 (32×32) to 96 (16×16)
Sprite pixels per scanline: 512
Sprites per scanline: 16 (32×32) to 32 (16×16)
Pole Position (1982)
Pole Position II (1983)
Top Racer (1982) - bootleg of Pole Position
Namco Pole Position Wikipedia (Text) CC BY-SA