Connection Machine

Origin of idea

Danny Hillis and Sheryl Handler founded Thinking Machines Corporation (TMC) in Waltham, Massachusetts in 1983, moving in 1984 to Cambridge, MA. At TMC, Hillis assembled a team to develop what would become the CM-1 Connection Machine, a design for a massively parallel hypercube-based arrangement of thousands of microprocessors, springing from this PhD thesis work at MIT in Electrical Engineering and Computer Science (1985). The dissertation won the ACM Distinguished Dissertation prize in 1985, and was presented as a monograph that overviewed the philosophy, architecture, and software for the first Connection Machine, including information on its data routing between central processing unit (CPU) nodes, its memory handling, and the programming language Lisp applied in the parallel machine.

CM designs

Each CM-1 microprocessor has its own 4 kilobits of random-access memory (RAM), and the hypercube-based array of them was designed to perform the same operation on multiple data points simultaneously, i.e., to execute tasks in single instruction, multiple data (SIMD) fashion. The CM-1, depending on the configuration, has as many as 65,536 individual processors, each extremely simple, processing one bit at a time. CM-1 and its successor CM-2 take the form of a cube 1.5 meters on a side, divided equally into eight smaller cubes. Each subcube contains 16 printed circuit boards and a main processor called a sequencer. Each circuit board contains 32 chips. Each chip contains a router, 16 processors, and 16 RAMs. The CM-1 as a whole has a 20-dimensional hypercube-based routing network, a main RAM, and an input-output processor (a channel controller). Each router contains 5 buffers to store the data being transmitted when a clear channel isn't available. The engineers had originally calculated that 7 buffers per chip would be needed, but this made the chip slightly too large too build. Nobel Prize winning physicist Richard Feynman had previously calculated that 5 buffers would be enough, using a differential equation involving the average number of 1 bits in an address. They resubmitted the design of the chip with only 5 buffers, and when they put the machine together, it worked fine. Each chip is connected to a switching device called a nexus. The CM-1 uses Feynman's algorithm for computing logarithms that he had developed at Los Alamos National Laboratory for the Manhattan Project. It is well suited to the CM-1, using as it did, only shifting and adding, with a small table shared by all the processors. Feynman also discovered that the CM-1 would compute the Feynman diagrams for quantum chromodynamics (QCD) calculations faster than an expensive special purpose machine developed at Caltech.

To improve its commercial viability, TMC launched the CM-2 in 1987, adding Weitek 3132 floating point numeric coprocessors and more RAM to the system. Thirty-two of the original one-bit processors shared each numeric processor. The CM-2 can be configured with up to 512 MB of RAM, and a redundant array of independent disks (RAID) hard disk system, called a DataVault, of up to 25 GB. Two later variants of the CM-2 were also produced, the smaller CM-2a with either 4096 or 8192 single-bit processors, and the faster CM-200.

Due to its origins in AI research, the software for the CM-1/2/200 single-bit processor was influenced by the Lisp programming language and a version of Common Lisp, *Lisp (spoken: Star-Lisp), was implemented on the CM-1. Other early languages included Karl Sims' IK and Cliff Lasser's URDU. Much system utility software for the CM-1/2 was written in *Lisp. Many applications for the CM-2, however, were written in C*, a data-parallel superset of ANSI C.

With the CM-5, announced in 1991, TMC switched from the CM-2's hypercubic architecture of simple processors to a new and different multiple instruction, multiple data (MIMD) architecture based on a fat tree network of reduced instruction set computing (RISC) SPARC processors. To make programming easier, it was made to simulate a SIMD design. The later CM-5E replaces the SPARC processors with faster SuperSPARCs. The CM-5 was the second-fastest system in the November 1993 TOP500 list, running 1024 cores with Rpeak of 131.0 GFLOPS/s.

Visual design

Connection Machines were noted for their (intentionally) striking visual design. The CM-1 and CM-2 design teams were led by Tamiko Thiel. The physical form of the CM-1, CM-2, and CM-200 chassis was a cube-of-cubes, referencing the machine's internal 12-dimensional hypercube network, with the red light-emitting diodes (LEDs), by default indicating the processor status, visible through the doors of each cube.

By default, when a processor is executing an instruction, its LED is on. In a SIMD program, the goal is to have as many processors as possible working the program at the same time – indicated by having all LEDs being steady on. Those unfamiliar with the use of the LEDs wanted to see the LEDs blink – or even spell out messages to visitors. The result is that finished programs often have superfluous operations to blink the LEDs.

The CM-5, in plan view, had a staircase-like shape, and also had large panels of red blinking LEDs. Prominent sculptor-architect Maya Lin contributed to the CM-5 design.