Altera

FPGAs

The Stratix series FPGAs are the company's largest, highest bandwidth devices, with up to 1.1 million logic elements, integrated transceivers at up to 28 Gbit/s, up to 1.6 Tbit/s of serial switching capability, up to 1,840 GMACs of signal-processing performance, and up to 7 x72 DDR3 memory interfaces at 800 MHz. Cyclone series FPGAs and SoC FPGAs are the company's lowest cost, lowest power FPGAs, with variants offering integrated transceivers up to 5 Gbit/s. In between these two device families are Arria series FPGAs, which provide a balance of performance, power, and cost for mid-range applications such as remote radio heads, video conferencing equipment, and wireline access equipment. Arria FPGAs have integrated transceivers up to 10 Gbit/s.

SoC FPGAs

Since December 2012, the company has been shipping SoC FPGA devices. According to Altera, fully depleted silicon on insulator (FDSOI) chip manufacturing process is beneficial for FPGAs. These devices integrate FPGAs with full hard processor systems based around ARM processors onto a single device.

PowerSoC

In May 2013, Altera acquired embedded power chipmaker Enpirion for $134m in cash ($141m including the assumption of debt). Since that time, Enpirion has been incorporated into Altera by becoming its own product offering within the Altera portfolio of products. The Enpirion products are power system-on-a-chip DC-DC converters that enable greater power densities and lower noise performance compared with their discrete equivalent. Unlike converters made from discrete components Enpirion dc-dc converters are simulated, characterized, validated and production qualified at delivery.

ASICs

Previously Altera offered a publicly available ASIC design flow based on HardCopy ASICs, which transitioned an FPGA design, once finalized, to a form which is not alterable. This design flow reduced design security risks as well as costs for higher volume production. Design engineers could prototype their designs in Stratix series FPGAs, and then migrate these designs to HardCopy ASICs when they were ready for volume production.

The unique design flow makes hardware/software co-design and co-verification possible. The flow has been benchmarked to deliver systems to market 9 to 12 months faster, on average, than with standard-cell solutions. Design engineers can employ a single RTL, set of intellectual property (IP) cores, and Quartus II design software for both FPGA and ASIC implementations. Altera's HardCopy Design Center manages test insertion.

BaySand provides similar service to Altera's HardCopy called MetalCopy. MetalCopy is based on BaySand's Metal Configurable Standard Cells (MCSC) and BaySand's ASIC design methodology flow. MetalCopy consists of taking the design from RTL to ASIC including Synthesis, Physical Layout, timing closure, test insertion, Build In Test, formal verification and static timing analysis. BaySand currently offers Metal Copy for all FPGA designs including 28nm and 14nm FPGA devices.

IP cores

Altera and its partners offer an array of intellectual property (IP) cores that serve as building blocks that design engineers can drop into their system designs to perform specific functions. IP cores eliminate some of the time-consuming tasks of creating every block in a design from scratch.

Altera offers an embedded portfolio with a broad selection of soft processor cores:

And one hard IP processor core:

Design software

All of Altera's devices are supported by a common design environment, Quartus II design software. Quartus II software is available in a subscription-based edition and a free Web-based edition. It includes a number of tools to foster productivity.

40-nm technology

In May 2008, Altera introduced the industry's first 40-nm programmable logic devices: the Stratix IV FPGAs and HardCopy IV ASICs. Both devices are available with integrated transceiver options. Since then, the company has also introduced Stratix IV GT FPGAs, which have 11.3 Gbit/s transceivers for 40G/100G applications, and Arria II GX FPGAs, which have 3.75 Gbit/s transceivers for power- and cost-sensitive applications.

Semiconductors manufactured on a 40-nm process node address many of the industry's key challenges, including power consumption, device performance, and cost. Altera's devices are manufactured using techniques such as 193-nm immersion lithography and technologies such as extreme low-k dielectrics and strained silicon. These techniques and technologies bring enhancements to device performance and power efficiency.

28-nm technology

In April 2010, Altera introduced the FPGA industry's second 28-nm device, the Stratix V FPGA (to Xilinx's Kintex-7 FPGA), available with transceivers at speeds up to 28 Gbit/s. This device family has more than 1 million logic elements, up to 53 Mb of embedded memory, up to 7 x72 DDR3 DIMMs at 800 MHz, 1.6 Gbit/s LVDS performance, and up to 3,680 variable-precision DSP blocks. In August 2011, Altera began shipping 28-nm Stratix V GT devices featuring 28-gigabits-per-second transceivers.

The devices also feature some unique features. Embedded HardCopy blocks harden standard or logic-intensive applications, increasing integration and delivering twice the density without a cost or power penalty. Altera has developed a user friendly method for partial reconfiguration, so core functionality can be changed easily and on the fly. And there is a path to HardCopy V ASICs, when designs are ready for volume production. Also, Altera’s 28 nm FPGAs aim to reduce power requirements to 200 mW per channel.

In December 2012, the company announced the shipment of its first 28 nm Cyclone V SoC devices, which have a dual-core ARM Cortex-A9 processor system with FPGA logic on a single chip. The new SoCs are targeted for wireless communications, industrial, video surveillance, automotive and medical equipment markets. With these SoCs devices, users are able to create custom field-programmable SoC variants for power, board space, performance and cost optimization.

14-nm technology

In February 2013, Altera announced an agreement with Intel to use Intel’s foundry services to produce its 14-nm node for the future manufacturing of its FPGAs, based on Intel’s 14 nm tri-gate transistor technology, in place of Altera’s ongoing agreement with Taiwan Semiconductor Manufacturing Corporation (TSMC).

In October 2016, nearly one year after Intel's integration with Altera, STRATIX 10 was announced, which is based on Intel's 14nm Tri-Gate process.

Competition

Altera's largest competitor is FPGA founder and market-share leader Xilinx.

The next closest competitors are Lattice Semiconductor and Actel (now Microsemi), each representing less than 10 percent of the market.

FPGA startup company Achronix is also a competitor but does not have any significant market share.

In broader terms, Altera competes with ASIC, structured ASIC, Metal Configurable Standard Cell (MCSC) like BaySand and Zero Mask-Charge ASIC companies like eASIC.

Specifically in ASIC, BaySand has introduced metal configurable FPGA (mcFPGA) products to fill the needs due to discontinued HardCopy from Altera.

Restatement

On June 21, 2006, Altera Corp. restated its 1996-2005 financial results to correct accounting errors related to stock-based compensation expense. Altera's CFO resigned after an SEC investigation revealed the decade of misstated earning reports resulted from the company's alleged culture of backdating stock options.

Acquisition by Intel

On June 1, 2015, Altera and Intel announced that Intel would acquire Altera in an all-cash transaction valued at approximately £15.73 billion ($16.7 billion). As of December 28, 2015, the acquisition has been completed.