In computer science, Zero Instruction Set Computer (ZISC) refers to a computer architecture based solely on pattern matching and absence of (micro-)instructions in the classical sense. These chips are known for being thought of as comparable to the neural networks, being marketed for the number of "synapses" and "neurons".
Contents
The acronym ZISC alludes to Reduced instruction set computer (RISC).
Design
The ZISC architecture alleviates the memory bottleneck by blending pattern memory with pattern learning and recognition logic.
Their massively parallel computing solves the "winner takes all problem in action selection" by allotting each "neuron" its own memory and allowing simultaneous problem-solving the results of which are settled up disputing with each other.
Commercial production
IBM released the first ZISC35 with 36 neurons in 1993 and the ZISC78 followed in 2000. Manufacturing was discontinued in 2001.
Between 1993 and 2010, DARPA and Intel co-developed the NI1000 around the same time of IBM's patent.
In August 2007, the CM1K (CogniMem 1,024 neurons) was introduced by CogniMem Ltd. CM1K was designed by Anne Menendez and Guy Paillet.
Practical uses of ZISC focus on pattern recognition, information retrieval (data mining), security and similar tasks.
Applications and controversy
According to TechCrunch, software emulations these types of chips are currently used for image recognition by many large tech companies, such as Facebook and Google. When applied to other miscellaneous pattern detection tasks, such as with text, results are said to be produced in microseconds even with chips released in 2007.
Junko Yoshida, of the EE Times, compared the NeuroMem chip with "The Machine", a machine capable of being able to predict crimes from scanning people's faces, from Person of Interest (TV series) describing it as "the heart of big data" and "foreshadow[ing] a real-life escalation in the era of massive data collection".