Transistor As A Service (TAAS) is a transistor-level reconfigurable chip technology which directly executes system code written in C/C++ and other languages using the same transistor real estate on chip. Such system code represents and abstracts system's functionality and interactions with the external world that the system interfaces with. Examples of system code are video encoding C model that takes camera sensor's RGB pixel data as input and outputs compressed video files, communication physical layer signal processing algorithms that have antenna signal as input and output demodulated data bits, deep convolutional neural networks process images and output recognized objects, etc. The biggest advantage of TAAS is its ASIC-like high performance and performance/power ratio as compared to processor or GPU architectures, making it the most suitable architecture for edge computing (client devices) in era of IoT.
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TAAS versus Processor and GPU
TAAS is an emerging chip technology to meet ever growing demand to run multiple heterogeneous high computation-complex systems with only one piece of silicon real estate by re-use of the same transistors through reconfigurations. The processor also shares the same transistors to run different system tasks in form of software, but due to its fixed and limited hardware resources such as execution units (EXE units) and memory access ports (load and store units), processor-like architecture is not suitable for running high computation-complex systems such as broadband wireless PHY signal processing or deep neural networks machine learning algorithms. GPU offers massive parallel computing capability by its many-core architecture. However the power consumption of GPU for memory access is far exceeding that of computation. GPU architecture is medium in performance as compared to ASIC and very high in power consumption.
TAAS versus ASIC
The main difference between TAAS and ASIC is that, in case of ASIC, the transistor is usually designed into fixed circuitry for specific task. For a dedicated system function, ASIC offers the best design efficiency (minimum transistor count, minimum power consumption). However for SoC which integrates multiple systems on a chip, different silicon IPs need to be integrated usually by putting them together that abut each other. Due to divide-and-conquer design approach adopted by ASIC, transistors between different systems are not shared. Silicon die area increases proportionally with the number of systems being integrated on the chip.
TAAS versus FPGA
Though TAAS is mostly similar to FPGA in terms of operation principles, they differ primarily in three aspects: i) for TAAS computation payload is extracted from system code + system test benches and then directly compiled to configurable hardware resources; whereas FPGA usually involves a manual engineering step by first develop HDL design such as Verilog RTL. Thus FPGA design is the same as ASIC design until synthesis and P&R step; 2) TAAS is able to explore full design space because it has complete system knowledge (system code + system test benches), whereas FPGA has HDL design as the input leaving design space exploration only available at the last step which is synthesis and P&R; iii) TAAS is transistor-level reconfigurable and FPGA is configurable at logic block level and thus hardware overhead for TAAS is much smaller than FPGA. Smaller granularity of configurability in the case of TAAS allows full design space exploration. In general, TAAS can achieve much more efficient implementation than FPGA in terms of overall transistor utilization rate and hence total number of transistors required to run system functionalities.
TAAS and IoT
TAAS extends the concept of software as a service (SAAS) for that once a client system requires computation or processing services, the resources (transistors for TAAS versus software for SAAS) are publicly available for clients to access. Chips in form of TAAS is driven by IoT applications where computation complexities are orders of magnitude higher than mobile smart phone applications meanwhile silicon die size cannot grow orders of magnitude bigger.