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Signetics 2650

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Signetics 2650

The Signetics 2650 was an 8-bit microprocessor introduced in mid-1975. According to Adam Osborne's book An Introduction to Microprocessors Vol 2: Some Real Products, it was "the most minicomputer-like" of the microprocessors available at the time.


Signetics sold development boards e.g. the PC1001 and its successor, the PC1500 "Adaptable Board Computer", ranging in price from A$165 to A$400. The chip by itself sold for around A$20. Several hardware construction projects and programming articles were published in magazines such as Electronics Australia and Elektor and related kits were sold by electronics stores. These factors led to its use by a number of hobbyists in many countries such as Australia, U.S.A., United Kingdom, the Netherlands and Germany.

The chip contained seven 8-bit general purpose registers, although only four were visible at any time. It was limited to a 15-bit address space (thereby addressing a maximum of 32 KB of memory), since the upper bit of a 16-bit memory reference was reserved to indicate that the indirect memory addressing mode was to be used (a minicomputer-like feature).

The address space was further limited by the use of another two bits of the address to indicate the indexing mode for all logical and arithmetic (i.e. non branch) instructions. This divided the address space into four 8 KB 'pages', only the current (i.e. the page the program was running in) could be addressed directly, the others only by indirect addressing.

While there were nine different addressing modes, the lack of any 16-bit registers and the 13–15-bit address space prevented widespread use. Despite this, an operating system ("2650 DOS") was available, along with 8 KB and 12 KB BASIC interpreters (sold by Central Data Corporation USA), and many games of the Hunt the Wumpus style. Most programs were written in assembly language.

Two types of video game console used the Signetics 2650 or 2650A. The first group of consoles are based on the video display controller 2636 Programmable Video Interface; the 1292 Advanced Programmable Video System and the closely related Interton VC4000 belong to this group. Those were released in Germany in 1976 and 1978 respectively. The second group of consoles were based on the Signetics 2637 as a video display controller; Emerson Arcadia 2001 which was released in 1982 and which used a Signetics 2650 running at 3.58 MHz as a CPU belong to this group together with many other ones software-compatible (Leonardo, Hanimex MPT-03 etc.).

At least four coin-operated video games were released in the 1970s which used the 2650 CPU – Atari QUIZ SHOW, Meadows Games 3D BOWLING, Meadows Games GYPSY JUGGLER, and Cinematronics EMBARGO.

The processor was also used in the Signetics Instructor 50, which was a small computer designed to teach the use and programming of the Signetics 2650 CPU.

The 2650 was also used in some large items of equipment such as the Tektronix 8540, a microprocessor software development system which supported various in-circuit emulator, trace memory and logic analyser cards for real-time debugging of microprocessor systems, as practiced in the 1980s. The 2650 provided the base operating system functions, data transfer, and interface to a host computer or serial computer terminal.

The processor was most suited as a microcontroller, due to its extensive I/O support:

  • Single bit i/o pins on the processor (sense/flag bits)
  • Signals to directly address two 8-bit I/O ports (control and data ports) using single byte instructions (port i/o). This circumvented the elaborate hardware other systems needed for memory-mapped I/O
  • Signals to address another 256 I/O ports using an 8-bit address and two byte instructions, again, limiting the amount of hardware (address decoding) required. Philips emphasized this use as a micro-controller with a demonstration program showing the 2650 controlling an intelligent elevator system. Also, at trade fairs they showed the 2650 controlling a miniature 'sort and stack' robot
  • Industrial Microcomputer System – IMS

    For a short time starting 1979, Philips sold a modular 2650 computer called the 'IMS' – Industrial Microcomputer System, based on the Eurocard format in a 19" rack. It included CPU, PROM, RAM, input, output and teletype modules. This system was meant as a more intelligent programmable logic controller. For development, they later added DEBUG, DISPLAY, INTERRUPT and MODEST ((E)PROM programmer) modules.

    Instruction set

    Although the 2650 is basically an 8-bit microprocessor, 64 opcodes are actually 9-bit, and another 32 opcodes are 11-bit (using bits in the address field). Of the remaining 128 8-bit opcodes, 124 (126 in the 2650B) are implemented, giving a total of 444 (446) instructions.

    Many more instructions are available as the behavior of the standard instructions can be modified by setting or clearing status bits: WC (with or without carry) and COM (logical or arithmetic compare). This doubled the number of rotate, add, subtract and compare instructions.

    The instruction set is strongly orthogonal: all logic and arithmetic instructions can use all nine addressing modes:

  • register
  • immediate
  • PC relative and PC relative indirect
  • absolute and absolute indirect
  • absolute indexed, absolute indexed with auto-increment, and absolute indexed with auto-decrement, both direct and indirect
  • The most significant bit of all relative and absolute addresses is used to indicate indirection.

    The only exceptions are where the opcodes of meaningless operations are used for other purposes:

  • the opcode for AND register zero with register zero is used for the HALT instruction.
  • the opcode for STORE register zero into register zero is used for the NOP instruction.
  • Although the instruction LOAD register zero with register zero would appear meaningless, and was officially unsupported, it did set the condition code and was often used to determine the status of this register.


    With all arithmetic and logical instructions using absolute (direct) addressing, bits 14 and 13 of the address field are used to indicate the indexing mode as follows:

  • 00 no indexing
  • 01 indexing with auto increment
  • 10 indexing with auto decrement
  • 11 indexing only
  • When indexing is specified, the register defined in the instruction becomes the index register, and the source/destination is implicitly Register zero. For indirect indexing, Post indexing is used, i.e. the indirect address is first fetched from memory and then the index is added to it.


    Probably the most mini-computer like aspect of the 2650 is the enormous number (62) of branch (jump) instructions; all these instructions could also use indirection:

  • BIRR and BIRA: Increment register and branch if non-zero (R0, R1, R2 or R3) with relative or absolute addressing
  • BDRR and BDRA: Decrement register and branch if non-zero (R0, R1, R2 or R3) with relative or absolute addressing
  • BRNR and BRNA: branch if register non-zero (R0, R1, R2 or R3) with relative or absolute addressing
  • BCTR and BCTA: branch on condition True (zero, greater-than, less-than or unconditional) with relative or absolute addressing
  • BCFR and BCFA: branch on condition False (zero, greater-than or less-than) with relative or absolute addressing.
  • ZBRR: branch relative to address zero
  • BXA: branch indexed
  • Highly unusual are the conditional branch to, and return from, a subroutine:

  • BSTR and BSTA: branch to subroutine on condition True (zero, greater-than, less-than or unconditional) with relative or absolute addressing
  • BSFR and BSFA: branch to subroutine on condition False (zero, greater-than or less-than) with relative or absolute addressing
  • BSNR and BSNA: branch to subroutine if register non-zero (R0, R1, R2 or R3) with relative or absolute addressing
  • RETC: return from subroutine on condition True (zero, greater-than, less-than or unconditional)
  • RETE: return from interrupt on condition True (zero, greater-than, less-than or unconditional)
  • ZBSR: branch to subroutine relative to address zero
  • BSXA: branch to subroutine indexed
  • Only the branch instructions using absolute addressing used all 15 bits of the address field as address. Using such a branch instruction was, therefore, the only way to set the two bits in the page register (controlling bits 14 and 13 of the address bus) and changing the current 8 KB page.


  • 2650 original version with 1.25 MHz maximum clock frequency
  • 2650A improved version (minor fabrication changes to improve stability) 1.25 MHz maximum clock frequency
  • 2650A-1 as 2650A with 2 MHz maximum clock frequency
  • 2650B
  • 2650B-1 as 2650B with 2 MHz maximum clock frequency
  • The 2650B had the following changes and improvements over the 2650A:

  • Two new signals – "Bus Enable" on pin 15 and "Cycle Last" on pin 25.
  • Program Status Word Upper bits 3 and 4 are setable and testable user flags (unused on the 2650A).
  • Two new instructions to save and restore the lower status register in order to simplify interrupt processing.
  • Single byte register R0 instructions execute faster (one cycle rather than two).
  • Peripheral chips

    The 2650 came with a full complement of peripheral chips:

  • 2621 Video Encoder (PAL)
  • 2622 Video Encoder (NTSC)
  • 2636 Programmable Video Interface
  • 2637 Universal Video Interface
  • 2651 Programmable Communication Interface
  • 2652 Multi-Protocol Communications Circuit (incl. Synchronous Data Link Control (SDLC))
  • 2653 Polynomial Generator / Checker
  • 2655 Programmable Peripheral Interface
  • 2656 SMI (System memory interface)
  • 2657 Direct Memory Access
  • 2661 Enhanced Programmable Communication Interface (EPCI)
  • 2670 Display Character and Graphics Generator
  • 2671 Programmable Keyboard and Communications Controller
  • 2672 Programmable Video Timing Controller
  • 2673 Video Attributes Controller
  • Many of these peripheral chips were designed so they could also be used with other microprocessors, for example the datasheet of the 2672 suggests using it with an Intel 8048 microcontroller.

    Philips Technical Note 083 describes how to interface the 2651 PCI to various other microprocessors, such as the 8080, 8085, Z80, 8048 and 6800

    Descendants of the 2651/2661 serial communications chips are still sold as the Philips SC26 series.

    2656 System Memory Interface

    The 2656 was specifically designed to augment, and interface with, the 2650 and make a 2-chip computer possible. It contained everything the 2650 lacked to make a complete computer:

  • 2 KB 8-bit mask-programmed ROM program memory
  • 128 bytes 8-bit RAM memory
  • Clock generator with crystal or RC network
  • Power-on reset
  • Eight general purpose I/O pins
  • The I/O pins could be used as an 8-bit I/O port or programmed to generate enable signals for extra RAM, ROM or I/O ports. This was achieved by mask-programming a Programmable Logic Array in the 2656.

    To develop and test the design before committing it to production, Philips sold the PC4000, a 2656 emulator board using PROM'S and FPLA's to emulate the ROM and PLA in the 2656.


    Signetics 2650 Wikipedia