Samiksha Jaiswal (Editor)

Project Denver

Updated on
Edit
Like
Comment
Share on FacebookTweet on TwitterShare on LinkedInShare on Reddit
Designed by
  
Nvidia

Cores
  
2

Instruction set
  
ARMv8-A

L2 cache
  
2 MiB

L1 cache
  
192 KiB (128 KiB I-cache with parity, 64 KiB D-cache with ECC) per core

Project Denver is the codename of a microarchitecture designed by Nvidia that implements the ARMv8-A 64/32-bit instruction sets using a combination of simple hardware decoder and software-based binary translation (dynamic recompilation) where "Denver's binary translation layer runs in software, at a lower level than the operating system, and stores commonly accessed, already optimized code sequences in a 128 MB cache stored in main memory". Denver is a very wide in-order superscalar pipeline. Its design makes it suitable for integration with other SIPs cores (e.g. GPU, display controller, DSP, image processor, etc.) into one die constituting a system on a chip (SoC).

Contents

Project Denver is targeted at mobile computers, personal computers, servers, as well as supercomputers.

Overview

  • Pipelined processor with 7-way superscalar execution pipeline
  • 128 KiB instruction + 64 KiB data L1 cache per core (both 4-way), 2 MiB L2 cache (16-way shared)
  • Denver also sets aside 128 MiB of main memory as an interpretation cache, which is inaccessible to the main operating system.
  • Running at up to 2.5 GHz
  • ARM code is translated either by a hardware translator or through software emulation to an instruction set that is internal to Project Denver. ARM instructions can be reordered, removed if they do not contribute to the end result, or otherwise optimized if used.

    • Chips

    A dual-core Denver CPU was paired with a Kepler-based GPU solution to form the (Tegra K1); the dual-core 2.3 GHz Denver-based K1 was first used in the HTC Nexus 9 tablet, released November 3, 2014. Note, however that the quad-core Tegra K1, while using the same name isn't based on Denver.

    Multi-core Denver CPU paired with some Maxwell-based GPU solution are expected to be released after Tegra K1.

    The Nvidia Tegra X2 has two Denver2 (ARMv8 64bit) cores inside and another four A57 (ARMv8 64bit) cores using a coherent HMP (Heterogeneous Multi-Processor Architecture) approach.

    History

    The existence of Project Denver was revealed at the 2011 Consumer Electronics Show. In a March 4, 2011 Q&A article CEO Jen-Hsun Huang revealed that Project Denver is a five-year 64-bit ARMv8-A architecture CPU development on which hundreds of engineers had already worked for three and half years and which also has 32-bit ARM instruction set (ARMv7) backward compatibility. Project Denver was started in Stexar Company (Colorado) as an x86-compatible processor using binary translation, similar to projects by Transmeta. Stexar was acquired by Nvidia in 2006.

    According to Tom's Hardware, there are engineers from Intel, AMD, HP, Sun and Transmeta on the Denver team, and they have extensive experience designing superscalar CPUs with out-of-order execution, very long instruction words (VLIW) and simultaneous multithreading (SMT).

    According to Charlie Demerjian, the Project Denver CPU may internally translate the ARM instructions to an internal instruction set, using firmware in the CPU. Also according to Demerjian, Project Denver was originally intended to support both ARM and x86 code using code morphing technology from Transmeta, but was changed to the ARMv8-A 64-bit instruction set because Nvidia could not obtain a license to Intel's patents.

    The first consumer device shipping with Denver CPU cores, Google's Nexus 9, was announced on October 15, 2014. The tablet is manufactured by HTC and features the dual-core Tegra K1 SoC. The Nexus 9 is also the first 64-bit Android device available to consumers.

    References

    Project Denver Wikipedia
    (Text) CC BY-SA