Siddhesh Joshi (Editor)

Patrick Lincoln

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Institutions
  
SRI International

Institution
  
SRI International

Fields
  
Computer Science

Name
  
Patrick Lincoln


Patrick Lincoln lifeboatcomboardpatricklincolngif

Known for
  
Computer Security, Formal verification, Computational Biology, Nanotechnology

Notable awards
  
SRI International Fellow 2005

Alma mater
  
Massachusetts Institute of Technology, Stanford University

Doctoral advisor
  
John C. Mitchell

Patrick Denis Lincoln (born 1964) is an American computer scientist leading the Computer Science Laboratory (CSL) at SRI International. Educated at MIT and then Stanford, he joined SRI in 1989 and became director of the CSL around 1998. He previously held positions with ETA Systems, Los Alamos National Laboratory, and MCC.

Contents

Patrick Lincoln Patrick Lincolns Home Page

Education and early career

Patrick Lincoln Patrick Lincoln Director Computer Science Laboratory SRI

Lincoln received a bachelor of science in electrical engineering and computer science from the Massachusetts Institute of Technology in 1986, with the thesis "DisCoRd distributed combinator reduction, automatic parallelizing compiler" under thesis advisor Rishiyur Nikhil. While pursuing that degree, he held a position in ETA Systems' Software Division from 1982 to 1983; one at Los Alamos National Laboratory, Division C-10 from 1984 to 1985. After graduation, he held a position with MCC from 1986 to 1988 in their Software Technology and Advanced Computer Architecture departments.

Lincoln then attended Stanford University, from 1989 to 1992, earning a Ph.D. in computer science under advisor John Mitchell. Lincoln's doctoral dissertation was "Computational aspects of linear logic".

Later career

In 1989, Lincoln joined SRI International's Computer Science Laboratory; he became its director around 1998. Patrick Lincoln is the director of SRI's Computer Science Laboratory. He is also the executive director of SRI's program for the Department of Homeland Security's Cyber Security Research and Development Center and director of the SRI Center for Computational Biology. He also leads numerous multidisciplinary research groups.

In 2013, he was featured in the BBC Horizon episode 50x02 "Defeating the Hackers" because of his recent research focus on secure computing and "cortical cryptography". That subject is focusing on how to store a password in someone's mind that they can't directly recall; for example, by teaching them to play a song and measuring their reaction times. Those methods are theoretically resistant to rubber-hose cryptanalysis, where a user is coerced to give up a password or other key; if you don't know a password, you can't tell it to someone.

Memberships and awards

He has served on the Defense Science Board task force on Science and Technology and of the Defense Science Board task force on Defensive Information Operations. He is also a member of the Association for Computing Machinery (ACM).

In 2005, Lincoln was named an SRI Fellow. In 2013, he and collaborators received the Best Paper Award at The 19th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC).

Selected publications

Patrick Lincoln holds over 180 scientific publications. He is amongst the computer scientists whose publications' h-index is above 40.

  • Probabilistic Modeling of Failure Dependencies Using Markov Logic Networks S Ghosh, W Steiner, G Denker, P Lincoln, Proceedings of the 19th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC), 2013. (Best Paper Award)
  • Neuroscience meets cryptography: designing crypto primitives secure against rubber hose attacks, H Bojinov, D Sanchez, P Reber, D Boneh, P Lincoln, Proceedings of the 21st USENIX conference on Security symposium, 33-33, 2012
  • Bootstrapping Communications into an Anti-Censorship System, P Lincoln, I Mason, P Porras, V Yegneswaran, Z Weinberg, J Massar, W A Simpson, P Vixie, D Boneh, 2nd USENIX Workshop on Free and Open Communications on the Internet, 2012
  • Dynamic LDPC codes for nanoscale memory with varying fault arrival rates, S Gosh, P Lincoln, Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2011 6th International Conference on, vol., no., pp. 1,4, 2011
  • Markov logic networks in health informatics, S Ghosh,P Lincoln, N Shankar, S Owre, S David, G Swan, Proceedings of ICML-MLGC, 2011
  • Homogeneity as an advantage: It takes a community to protect an application, L Briesemeister, S Dawson, P Lincoln, H Saidi, J Thornton, G Durfee, P Kwan, E Stinson, A Oliner, J Mitchell, CollSec'10 Proceedings of the 2010 international conference on Collaborative methods for security and privacy, 2010
  • Challenges in scalable fault tolerance, P Lincoln, Nanoscale Architectures, NANOARCH'09. IEEE/ACM International Symposium on Nanoscale Architectures, 2009
  • Unification and narrowing in Maude 2.4, M Clavel, F Durán, S Eker, S Escobar, P Lincoln, N Martí-Oliet, J Meseguer, C Talcott, Rewriting Techniques and Applications, 380-390 2009
  • Early indicators of exposure to biological threat agents using host gene profiles in peripheral blood mononuclear cells, R Das, R Hammamieh, R Neill, GV Ludwig, S Eker, P Lincoln, P Ramamoorthy, A ..., BMC infectious diseases 8 (1), 2008
  • Maude: Specification and programming in rewriting logic, M Clavel, F Durán, S Eker, P Lincoln, N Martı-Oliet, J Meseguer, JF Quesada, Theoretical Computer Science 285 (2), 187-243, 2002 cited 766
  • Architectural support for copy and tamper resistant software, D Lie, C Thekkath, M Mitchell, P Lincoln, D Boneh, J Mitchell, M Horowitz, ACM SIGPLAN Notices 35 (11), 168-177, 2000 cited 520
  • Using Maude, M Clavel, F Durán, S Eker, P Lincoln, N Martí-Oliet, J Meseguer, JF Quesada, Fundamental Approaches to Software Engineering, 371-374, 2000 cited 400
  • A meta-notation for protocol analysis, I Cervesato, NA Durgin, PD Lincoln, JC Mitchell, A Scedrov, Computer Security Foundations Workshop, 1999. Proceedings of the 12th IEEE ..., 1999 cited 299
  • Principles of maude, M Clavel, S Eker, P Lincoln, J Meseguer, Electronic Notes in Theoretical Computer Science 4, 65-89, 1996 cited 294
  • Undecidability of bounded security protocols, NA Durgin, PD Lincoln, JC Mitchell, A Scedrov, In Workshop on Formal Methods and Security Protocols, 1999, cited 291
  • The maude 2.0 system, M Clavel, F Durán, S Eker, P Lincoln, N Martí-Oliet, J Meseguer, C Talcott, Rewriting Techniques and Applications, 76-87, 2003 cited 285
  • Efficient implementation of lattice operations, H Aït-Kaci, R Boyer, P Lincoln, R Nasr, ACM Transactions on Programming Languages and Systems 11 (1), 115-146, 1989 cited 270
  • All about maude-a high-performance logical framework: how to specify, program and verify systems in rewriting logic, M Clavel, F Durán, S Eker, P Lincoln, N Martí-Oliet, J Meseguer, C Talcott, Springer-Verlag, 2007 cited 263
  • A probabilistic poly-time framework for protocol analysis, P Lincoln, J Mitchell, M Mitchell, A Scedrov, Proceedings of the 5th ACM conference on Computer and communications ... 1998, cited 243
  • Decision problems for propositional linear logic, P Lincoln, J Mitchell, A Scedrov, N Shankar, Annals of pure and applied logic 56 (1), 239-311, 1992 cited 239
  • Stochastic assembly of sublithographic nanoscale interfaces, A DeHon, P Lincoln, JE Savage, Nanotechnology, IEEE Transactions on 2 (3), 165-174, 2003 cited 194
  • All About Maude-A High-Performance Logical Framework, How to Specify, Program and Verify Systems in Rewriting Logic, volume 4350 of Lecture Notes in Computer Science, M Clavel, F Durán, S Eker, P Lincoln, N Martı-Oliet, J Meseguer, CL Talcott, Springer 4, 50-88, 2007 cited 174
  • Pathway logic: Symbolic analysis of biological signaling, S Eker, M Knapp, K Laderoute, P Lincoln, J Meseguer, K Sonmez, Pacific symposium on Biocomputing 7, 400-412, 2002 cited 154
  • Multiset rewriting and the complexity of bounded security protocols, N Durgin, P Lincoln, J Mitchell, A Scedrov, Journal of Computer Security 12 (2), 247-311, 2004 cited 134
  • Maude manual (version 2.6), M Clavel, F Durán, S Eker, P Lincoln, N Martı-Oliet, J Meseguer, C Talcott, University of Illinois, Urbana-Champaign 1 (3), 4.6, 2011 cited 130
  • A formally verified algorithm for interactive consistency under a hybrid fault model, P Lincoln, J Rushby, Fault-Tolerant Computing, 1993. FTCS-23. Digest of Papers., 1993. Also appears in FTCS: Highlights from 25 Years, 1995, pp. 438–447 cited 111
  • On Shostak's decision procedure for combinations of theories, D Cyrluk, P Lincoln, N Shankar, Automated Deduction—CADE-13, 463-477, 1996 cited 101
  • Privacy-preserving sharing and correction of security alerts, P Lincoln, P Porras, V Shmatikov, Proceedings of the 13th conference on USENIX Security Symposium-Volume 13, 17-17, 2004 cited 100
  • Patents

    Dr. Lincoln holds more than 40 patents in varied fields, including computer security, high-assurance systems, advanced user interfaces, computer networking, robotics, biotechnology, and nanotechnology. A selected subset is listed below.

    Computer and Information Security
  • System and method for authenticating a manufactured product with a mobile device, SM Eker, PD Lincoln, US Patent 8,534,543, 2013 and US Patent 8,534,544, 2013
  • System and method using information based indicia for securing and authenticating transactions, PD Lincoln, N Shankar, US Patent 7,117,363, 2006 and US Patent 8,171,297, 2012
  • Lattice-based security classification system and method, PD Lincoln, SM Dawson, P Samarati, SDC di Vimercati, US Patent 6,922,696, 2005
  • High-Assurance Systems
  • Formal methods for modeling and analysis of hybrid systems, A Tiwari, PD Lincoln, US Patent 7,574,334, 2009
  • Advanced Collaborative Multimodal User Interfaces
  • Adaptable actuated input device with integrated proximity detection, R Senanayake, G Denker, PD Lincoln, J Murray, SS Weiner, US Patent 20,130,215,038, 2013
  • Method for adaptive interaction with a legacy software application, R Senanayake, G Denker, PD Lincoln, J Murray, SS Weiner, US Patent 20,130,215,005, 2013
  • Adaptable input/output device, R Senanayake, G Denker, PD Lincoln, RD Kornbluh, SJ Lincoln, RP Heydt, H ..., US Patent 20,120,313,857 2012 and US Patent 20,120,313,854, 2012
  • Computer Networking
  • Method and apparatus for processing network packets, PD Lincoln, SM Eker, US Patent 7,706,378, 2010
  • Methods and apparatus for scalable, distributed management of virtual private networks, DWJ Stringer-Calvert, SM Dawson, PD Lincoln, US Patent 7,403,980, 2008
  • Method and apparatus for providing scalable resource discovery, DWJ Stringer-Calvert, PD Lincoln, SM Dawson, US Patent 7,177,867, 2007
  • Method and apparatus for generating, distributing and reconstructing deconstructed video, PD Lincoln, DWJ Stringer-Calvert, SM Dawson, US Patent 7,095,444, 2006
  • Robotics
  • Wall crawling robots, RE Pelrine, H Prahlad, RD Kornbluh, PD Lincoln, S Stanford, US Patent 7,554,787, 2009, US Patent 7,554,784, 2009, and US Patent 8,111,500, 2012
  • Biotechnology
  • Nanoscale array biomolecular bond enhancer device, PD Lincoln, US Patent App. 12/215,239, 2008, and US Patent 7,985,385, 2011
  • Modeling and evaluation metabolic reaction pathways and culturing cells, SM Eker, PD Lincoln, PD Karp, P Romero, US Patent 7,308,363, 2007
  • Biopolymer sequence comparison, LR Toll, PD Lincoln, PD Karp, K Sonmez, US Patent 7,133,781, 2006
  • Data relationship model, K Sonmez, LR Toll, PD Lincoln, PD Karp, US Patent 7,039,238, 2006
  • Method and apparatus for classifying nucleic acid responses to infectious agents, PD Lincoln, SM Eker, US Patent App. 11/335,982, 2006
  • Method and apparatus for real-time correlation of data collected from biological sensors, PD Lincoln, ADJ Valdes, PA Porras, US Patent App. 11/073,257, 2005
  • Nanotechnology
  • Nanoscale volumetric imaging device having at least one microscale device for electrically coupling at least one addressable array to a data processing means, PD Lincoln, CM Patton, US Patent 7,683,303, 2010
  • Sublithographic nanoscale memory architecture, A Dehon, CM Lieber, PD Lincoln, J Savage, US Patent 6,963,077, 2005 and EP Patent 1,525,586, 2007
  • Nanoscale selection circuit, A Dehon, PD Lincoln, CM Lieber, J Savage, EP Patent 1,758,126, 2007
  • Stochastic assembly of sublithographic nanoscale interfaces, A DeHon, CM Lieber, PD Lincoln, JE Savage, US Patent 6,900,479, 2005 and EP Patent 1,525,585, 2005
  • Three-dimensional memory array, A Dehon, PD Lincoln, CM Lieber, J Savage, EP Patent 1,630,819, 2009
  • References

    Patrick Lincoln Wikipedia