MMIX

Architecture

MMIX is a big-endian 64-bit RISC, with 256 64-bit general-purpose registers, 32 64-bit special-purpose registers, fixed-length 32-bit instructions and a 64-bit virtual address space. The MMIX instruction set comprises 256 opcodes, one of which is reserved for future expansion. MMIX uses IEEE 754 floating-point numbers.

Instructions

All instructions have an associated mnemonic. For example, instruction #20 (32) is associated with ADD. Most instructions have the symbolic form "OP X,Y,Z", where OP specifies the sort of instruction, X specifies the register used to store the result of the instruction and the rest specify the operands of the instruction. Each of these fields is eight bits wide. For example, ADD $0,$1,3 means "Set $0 to the sum of $1 and 3."

Most instructions can take either immediate values or register contents; thus a single instruction mnemonic may correspond to one of two opcodes.

MMIX programs are typically constructed using the MMIXAL assembly language. The below is a simple MMIXAL program, which prints the string "Hello, world":

Registers

There are 256 directly addressable general-purpose architectural registers in an MMIX chip, designated by $0 through $255, and 32 special-purpose architectural registers. Two of the special registers, rL and rG, determine which of the general registers are local and which are global. All registers from $0 ... ([rL] − 1) are local registers, and represent a window into an internal stack of registers. Registers from [rL] ... ([rG] − 1) are "marginal registers" they always return 0 if they are used as a source in an operation. Using a marginal register as the destination of an operation will cause the machine to automatically increase rL to include that register. All registers [rG] ... $255 are called global registers, and are not part of the register stack.

Local register stack

The local register stack provides each subroutine with its own rL local registers, designated by $0 through $(rL − 1). Whenever a subroutine is called, a number of local registers are pushed down the stack (by shifting the start of the window). The arguments of the called subroutine are left in the remaining local registers. When a subroutine finishes it pops the previously pushed registers. Because the internal stack can contain only a finite number of registers, it may be necessary to store a part of the stack in memory. This is implemented with the special registers rO and rS which record which part of the local register stack is in memory and which part is still in local physical registers. The register stack provides for fast subroutine linkage.

Special registers

The 32 special physical architectural registers are as follows:

1. rB, the bootstrap register (trip) When tripping, rB ← $255 and $255 ← rJ. Thus saving rJ in a general register.
2. rD, the dividend register Unsigned integer divide uses this as the left half of the 128-bit input that is to be divided by the other operand.
3. rE, the epsilon register Used for floating comparisons with respect to epsilon.
4. rH, the himult register Used to store the left half of the 128-bit result of unsigned integer multiplication.
5. rJ, the return-jump register Used to save the address of the next instruction by PUSHes and by POP to return from a PUSH.
6. rM, the multiplex mask register Used by the multiplex instruction.
7. rR, the remainder register Is set to the remainder of integer division.
8. rBB, the bootstrap register (trap) When trapping, rBB ← $255 and $255 ← rJ. Thus saving rJ in a general register
9. rC, the cycle counter Incremented every cycle.
10. rN, the serial number A constant identifying this particular MMIX processor.
11. rO, the register stack offset Used to implement the register stack.
12. rS, the register stack pointer Used to implement the register stack.
13. rI, the interval counter Decremented every cycle. Causes an interrupt when zero.
14. rT, the trap address register Used to store the address of the trip vector.
15. rTT, the dynamic trap address register Used to store the address of the trap vector.
16. rK, the interrupt mask register Used to enable and disable specific interrupts.
17. rQ, the interrupt request register Used to record interrupts as they occur.
18. rU, the usage counter Used to keep a count of executed instructions.
19. rV, the virtual translation register Used to translate virtual addresses to physical addresses. Contains the size and number of segments, the root location of the page table and the address space number.
20. rG, the global threshold register All general registers references with a number greater or equal to rG refer to global registers.
21. rL, the local threshold register All general registers references with a number smaller than rL refer to local registers.
22. rA, the arithmetic status register Used to record, enable and disable arithmetic exception like overflow and divide by zero.
23. rF, the failure location register Used to store the address of the instruction that caused a failure.
24. rP, the prediction register Used by conditional swap (CSWAP).
25. rW, the where-interrupted register (trip) Used, when tripping, to store the address of the instruction after the one that was interrupted.
26. rX, the execution register (trip) Used, when tripping, to store the instruction that was interrupted.
27. rY, the Y operand (trip) Used, when tripping, to store the Y operand of the interrupted instruction.
28. rZ, the Z operand (trip) Used, when tripping, to store the Z operand of the interrupted instruction.
29. rWW, the where-interrupted register (trap) Used, when trapping, to store the address of the instruction after the one that was interrupted.
30. rXX, the execution register (trap) Used, when trapping, to store the instruction that was interrupted.
31. rYY, the Y operand (trap) Used, when trapping, to store the Y operand of the interrupted instruction.
32. rZZ, the Z operand (trap) Used, when trapping, to store the Z operand of the interrupted instruction.

Hardware implementations

As of October 2015, no known hardware implementations of the MMIX instruction set architecture exist. However, the fpgammix project implements MMIX in Verilog, making it possible to implement using a field-programmable gate array.

Software tools

The MMIX instruction set architecture is supported by a number of software tools for computer architecture research and software development.

Simulators and assembler

Compiler

The GNU Compiler Collection includes an MMIX back-end for its C/C++ compilers, contributed by Hans-Peter Nilsson and part of the main GCC distribution since late 2001. As of January 2011, the MMIX back-end to GCC continues to be actively developed and maintained by volunteers.

The above tools could theoretically be used to compile, build, and bootstrap an entire FreeBSD, Linux, or other similar operating system kernel onto MMIX hardware, were such hardware to exist.