Logarithmic resistor ladder

Logarithmic input/output behavior

As in digital-to-analog converters, a binary word is applied to the ladder network, whose N bits are treated as representing an integer value according to the relation:

C o d e V a l u e = ∑ i = 1 N s i ⋅ 2 i − 1 where s i represents a value 0 or 1 depending on the state of the i^th switch.

For a conventional DAC or R-2R network, the output signal value (its voltage) would be:

V o u t = a ⋅ ( C o d e V a l u e + b ) ⋅ V i n where a and b are design constants and where V i n typically is a constant reference voltage.

(DA-converters that are designed to handle a variable input voltage are termed multiplying DAC.)

In contrast, the logarithmic ladder network discussed in this article creates a behavior as:

log ⁡ ( V o u t / V i n ) = a ⋅ ( C o d e V a l u e + b ) where V i n is a variable input signal.

This example circuit is composed of 4 stages, numbered 1 to 4, and an additional leading Rsource and trailing Rload. Each stage i, has a designed input-to-output voltage attenuation ratio_i as:

R a t i o i = if s w i then α 2 i − 1 else 1

For logarithmic scaled attenuators, it is common practice to express their attenuation in decibels:

d B ( R a t i o i ) = 20 log 10 ⁡ α 2 i − 1 = 2 i − 1 ⋅ 20 ⋅ log 10 ⁡ α for i = 1.. N and s w i = 1

This reveals a basic property: d B ( R a t i o i + 1 ) = 2 ⋅ d B ( R a t i o i )

To show that this R a t i o i satisfies the overall intention:

log ⁡ ( V o u t / V i n ) = log ⁡ ( ∏ i = 1 N R a t i o i ) = ∑ i = 1 N log ⁡ ( R a t i o i ) = a ⋅ ( C o d e V a l u e + b ) for b = 0 and a = log ⁡ ( α )

The different stages 1 .. N should function independently of each other, as to obtain 2^N different states with a composable behavior. To achieve an attenuation of each stage that is independent of its surrounding stages, either one of two design choices is to be implemented: constant input resistance or constant output resistance.

Constant input resistance

The input resistance of any stage shall be independent of its on/off switch position, and must be equal to R_load.

This leads to:

{ R i , p a r r = ( R i , b ⋅ R l o a d ) / ( R i , b + R l o a d ) R i , a + R i , p a r r = R l o a d R i , p a r r / ( R i , a + R i , p a r r ) = R a t i o i

With these equations, all resistor values of the circuit diagram follow easily after choosing values for N, α and R_load. (The value of R_source does not influence the logarithmic behavior)

Constant output resistance

The output resistance of any stage shall be independent of its on/off switch position, and must be equal to R_source.

This leads to:

{ R i , s e r = R i , a + R s o u r c e R i , s e r ⋅ R i , b / ( R i , s e r + R i , b ) = R s o u r c e R i , b / ( R i , s e r + R i , b ) = R a t i o i

Again, all resistor values of the circuit diagram follow easily after choosing values for N, α and R_source. (The value of R_load does not influence the logarithmic behavior)

Circuit variations

The circuit as depicted above, can also be applied in reverse direction. That correspondingly reverses the role of constant-input and constant-output resistance equations.

Since the stages do not influence each other's attenuation, the stage order can be chosen arbitrarily. Such reordering can have a significant effect on the input resistance of the constant output resistance attenuator and vice versa.

Background

R-2R ladder networks used for Digital-to-Analog conversion are rather old. A historic description is in a patent filed in 1955.

Multiplying DA-converters with logarithmic behavior were not known for a long time after that. An initial approach was to map the logarithmic code to a much longer code word, which could be applied to the classical (linear) R-2R based DA-converter. Lengthening the codeword is needed in that approach to achieve sufficient dynamic range. This approach was implemented in a device from Analog Devices inc., protected through a 1981 patent filing.