Industry IT, Cybersecurity Headquarters Edinburgh Number of employees 25 (2016) | Website www.criticalblue.com Founded 2001 Type of business Private | |
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Founder David Stewart
Richard Taylor
Ben Hounsell Key people David Stewart
(CEO)
Richard Taylor
(CTO)
Lucio Lanza
(Board member)
Kathryn Kranen
(Board member) Products SECaaS
Dynamic Analysis Tools
Profiling Tools
Verification Tools Services API Security
Application Security
Software Optimization
Performance Tuning
Performance Prediction
Multicore Programming |
CriticalBlue is a Scottish software company based in Edinburgh that is primarily active in two areas of technology: anti-botnet solutions for mobile businesses, and software optimization tools and services for Android and Linux platforms.
Contents
Criticalblue prism
History
In 2001, David Stewart, Richard Taylor and Ben Hounsell founded the software company CriticalBlue in Edinburgh, Scotland. The company won a Smart Scotland Award in 2002 for "Electronic design automation tools for improved design of demanding multimedia applications." CriticalBlue received $2 million in seed funding and assembled a core team in 2003.
In May 2008, CriticalBlue joined the Multicore Association, where CEO David Stewart would eventually co-chair the Multicore Programming Practices workgroup in 2009. The company received $4 million funding in September 2008 from European, Silicon Valley, and Japanese venture capitalists and corporate investors, and started a close collaboration with Toshiba Corporation.
During 2010, CriticalBlue extended Prism product support for MIPS, Cavium, and Freescale. In 2011, the company added support for TI C66x DSPs and second generation Intel Core processors. The company expanded the range of supported Renesas platforms in 2012.
In 2013, CriticalBlue refocused on mobile Android and embedded Linux platforms.
Prism
First released in 2009, Prism dynamically traces software applications at runtime and captures data that can be used to analyze and identify the causes of poor performance. Prism received the "Best of Show" Award at the 2009 Silicon Valley Embedded Systems Conference.
Bryon Moyer, in Real World Multicore Embedded Systems, states that Prism's objective is "to provide analysis and an exploration and verification environment for embedded software development using multicore architectures." Moyer also describes the Prism interface as a set of integrated views in the GUI that display interactions between threads, data dependencies, cache analysis, along with the microprocessor pipeline.
Matassa and Domeika, in Break Away with Intel Atom Processors, similarly state that Prism is a "toolsuite aimed at optimized software development for multi-core and/or multithreaded architectures." While mentioning the same analysis views in the Prism GUI described by Moyer, they also describe the dynamic tracing approach, whereby "[t]races of the user's software application are extracted either from a simulator of the underlying processor core or via an instrumentation approach where the application is dynamically instrumented to produce the required data."
Cascade
Finalized in 2003 and commercially released in 2004, CriticalBlue's Cascade is a C to RTL synthesizer. Richard Taylor and David Stewart, from CriticalBlue itself, provided a chapter in Customizable Embedded Processors, describing Cascade as a "solution [that] allows software functionality implemented on an existing main CPU to be migrated onto an automatically...generated coprocessor." They stated that this is realized as an automated design flow from an embedded software implementation onto a coprocessor described in RTL. They identified offloading computationally-intensive algorithms from the main processor as the primary usage of such a coprocessor. Cascade was awarded "Best Wireless Design Tool" in 2003 by the Wireless Systems Design magazine.
Patents
Publications
- Hounsell, Ben & Taylor, Richard. Co-processor Synthesis: A New Methodology for Embedded Software Acceleration, Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE’04), 16 February 2004. Retrieved on 23 June 2014.
- Taylor, Richard et al. Automated data cache placement for embedded VLIW ASIPs, codes-isss, pp. 39–44, Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'05), 19 September 2005. Retrieved on 23 June 2014.
- Morgan, Paul & Taylor, Richard. ASIP instruction encoding for energy and area reduction, DAC '07 Proceedings of the 44th annual Design Automation Conference, Pages 797-800, 4 June 2007. Retrieved on 23 June 2014.