Girish Mahajan

Cray X2

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Cray X2

The Cray X2 is a vector processing node for the Cray XT5h supercomputer, developed and sold by Cray Inc. and launched in 2007.

The X2, developed under the code name Black Widow, was originally expected to be a standalone supercomputer system, superseding the Cray X1 parallel vector supercomputer. However, the X2 was eventually launched as one of the four processor "blade" options for the XT5h system.

An X2 blade comprises two nodes, each with four symmetric multiprocessing vector processors and 32 or 64 GB of shared memory. Each node has a peak performance of more than 100 gigaflops. X2 processors are connected using a radix-64 "fat-tree" interconnect implemented by the YARC router ASIC. X2 blades also link into the XT5h system via its SeaStar2+ processor interconnect.

Up to 256 X2 blades can be installed in an XT5h system. The X2 processor nodes integrate with the Cray XT5h's UNICOS/lc OS, user environment, and storage subsystem, as part of the Rainier project.


Cray X2 Wikipedia

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