In computing, a coherent cache is a cache with features for cache coherency between multiple processors or possibly DMA channels.
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Examples
Most multi-core processors feature a coherent cache hierarchy, typically a shared L3, a single L2 per core, and a L1 instruction cache and data cache per core. (modified harvard architecture). Coherency is maintained between the cores by logic in the L3 cache.
Alternatives
Some systems do not maintain cache coherence between different processors (e.g. a CPU and GPU sharing the same unified memory), and instead rely on the OS or system libraries to disable caching on pages that are used by both processors.
References
Coherent cache Wikipedia(Text) CC BY-SA