Stub Series Terminated Logic (SSTL) is a group of electrical standards for driving transmission lines commonly used with DRAM based DDR memory IC's and memory modules. SSTL is primarily designed for driving the DDR (double-data-rate) SDRAM modules used in computer memory; however, it is also used in other applications, notably some PCI Express PHYs and other high-speed devices.
Four voltage levels for SSTL are defined:
SSTL_3 uses a reference of .45*VDDQ(1.5V). SSTL_2 and SSTL_18 reference a voltage that is exactly VDDQ/2(1.25V and .9V respectively).
SSTL_3 and SSTL_2 support two termination classes (50 ohm or 25 ohm load). SSTL_18 only supports one (25 ohm load).
References
Stub Series Terminated Logic Wikipedia(Text) CC BY-SA