The plesiochronous digital hierarchy (PDH) is a technology used in telecommunications networks to transport large quantities of data over digital transport equipment such as fibre optic and microwave radio systems. The term plesiochronous is derived from Greek plēsios, meaning near, and chronos, time, and refers to the fact that PDH networks run in a state where different parts of the network are nearly, but not quite perfectly, synchronized.
Backbone transport networks replaced PDH networks with synchronous digital hierarchy (SDH) or synchronous optical networking (SONET) equipment over the ten years ending around the turn of the millennium (2000), whose floating payloads relaxed the more stringent timing requirements of PDH network technology. The cost in North America was $4.5 billion in 1998 alone, p. 171.
PDH allows transmission of data streams that are nominally running at the same rate, but allowing some variation on the speed around a nominal rate. By analogy, any two watches are nominally running at the same rate, clocking up 60 seconds every minute. However, there is no link between watches to guarantee that they run at exactly the same rate, and it is highly likely that one is running slightly faster than the other.
Implementation
The data rate is controlled by a clock in the equipment generating the data. The rate is allowed to vary by ±50 ppm of 2048 kbit/s (according to ITU-T recommendation). This means that different data streams can (and probably do) run at slightly different rates from one another.
In order to move multiple data streams from one place to another, they are multiplexed in groups of four. Because each of the four data streams is not necessarily running at the same rate, some compensation has to be introduced. Typically the multiplexer takes the data from the 4 incoming 2.048Mbit data streams and feeds each into a 2.112Mbit/s stream leaving a series of fixed gaps in each frame.
The data rate is thus 2.112Mbit/s x (number of bits in a frame - number of gaps)/(number of bits in a frame)This is slightly greater than 2.048Mbit/s + 50ppm. If an extra gap is added this is slightly smaller than 2.048Mbit/s - 50ppm. Thus on average the data rate can be made exactly equal to the incoming rate by adding a gap in some frames and not others. This extra gap is in a fixed place in the frame and is referred to as the “stuffable bit”. If it does not contain data (i.e. it’s a gap) it is “stuffed”. The data from the 4 data streams in now contained in 4 data streams of 2.112Mbit/s which are synchronous and can easily be multiplexed to give a single stream of 8.448Mbit/s by taking 1 bit from stream #1, followed by 1 bit from stream #2, then #3, then #4 etc. Some of the fixed gaps accommodate a synchronisation word which allows the demultiplexer to identify the start of each frame and others contain control bits for each stream which say whether or not the stuffable bit is stuffed or not (i.e. contains data or not). The process can then be reversed by the demultiplexer and 4 data streams produced with exactly the same bit rate as previous. The irregularity is ironed out using a phase locked loop.
The process is sometimes called "pulse justification" because "justification" in printing is adding gaps so that each line takes up a full column width. It is believed that this term was preferred because "synchronisation by stuffing stuffable bits" sounded a bit rude!
Similar techniques are used to combine four × 8 Mbit/s together, plus bit stuffing and Frame Alignment, giving 34 Mbit/s. Four × 34 Mbit/s, gives 140. Four × 140 gives 565.