The Elbrus (Russian: Эльбрус) is a line of Soviet and Russian computer systems developed by Lebedev Institute of Precision Mechanics and Computer Engineering. These computers are used in the space program, nuclear weapons research, and defense systems. In 1992 a spin-off company Moscow Center of SPARC Technologies (MCST) was created and continued development, using the "Elbrus" moniker as a brand for all computer systems developed by the company.
Historically, computers under the Elbrus brand comprised several different instruction set architectures.
The first of them was the line of the large fourth-generation computers, developed by Vsevolod Burtsev. These were heavily influenced by the Burroughs large systems and similarly to them implemented tag-based architecture and a variant of ALGOL as system language.
Elbrus 1 (1973) was the first in the line.
A side development was an update of the 1965 BESM-6 as Elbrus-1K2.
Elbrus 2 (1977) was a 10-processor computer, considered the first Soviet supercomputer, with superscalar RISC processors. Re-implementation of the Elbrus 1 architecture with faster ECL chips.
After that Burtsev retired, and new Lebedev's chief developer, Boris Babaian, introduced the completely new system architecture. Differing completely from the architecture of both Elbrus 1 and Elbrus 2, it employed a VLIW approach.
Elbrus 3 (1986) was a 16-processor computer developed by the Babayan's team, and one of the first VLIW computers in the world.
Elbrus 2000 (2001) was a microprocessor development of the Elbrus 3 architecture. Also known as Elbrus-S.
Elbrus-3M1 (2005) is a two-processor computer based on Elbrus 2000 microprocessor working at 300 MHz.
Elbrus МВ3S1/C (2009) is a ccNUMA four-processor computer based on Elbrus-S microprocessor working at 500 MHz.
Elbrus-2S+ (2011) working at 500 MHz, with capacity to calculate 16 GFlops.
Elbrus-2SM (2014) working at 300 MHz, with capacity to calculate 9.6 GFlops.
Elbrus-4S (2014) working at 800 MHz, with capacity to calculate 50 GFlops.
Elbrus-8S (2014–2015) working at 1300 MHz, with capacity to calculate >200 GFlops.
Elbrus-16S (2018) with capacity to calculate >1 TFlops.
In the late 1990s, a series of SPARC-based CPUs were developed at MCST as a way to raise the fund for the in-house IP development and to fill the niche of domestically-developed CPUs for the backdoor-wary military.
Elbrus-90micro (1998–2010) is a computer line based on SPARC instruction set architecture (ISA) microprocessors: MCST R80, R150, R500, R500S and MCST-4R working at 80, 150, 500 and 1000 MHz.
