Trisha Shetty (Editor)

ARM Cortex A17

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Designed by
  
ARM Holdings

Microarchitecture
  
ARMv7-A

Cores
  
1–4, can be combined with less powerful A7 cores in a big.LITTLE configuration

L1 cache
  
32–64 KiB instruction 32 KiB data

L2 cache
  
256 KiB–8 MiB (configurable L2 cache controller)

The ARM Cortex-A17 is a 32-bit processor core implementing the ARMv7-A architecture, licensed by ARM Holdings. Providing up to four cache-coherent cores, it serves as the successor to the Cortex-A9 and replaces the previous ARM Cortex-A12 specifications. ARM claims that the Cortex-A17 core provides 60% higher performance than the Cortex-A9 core, while reducing the power consumption by 20% under the same workload.

ARM renamed Cortex-A12 to a variant of Cortex-A17 since the second revision of the A12 core in early 2014, because these two were indistinguishable in performance and all features available in the A17 were used as upgrades in the A12.

New features of the Cortex-A17 specification, not found in the Cortex-A9 specification, are all improvements from the third-generation ARM Cortex-A, which also includes the Cortex-A7 and Cortex-A15:

  • Hardware virtualization and 40-bit Large Physical Address Extensions (LPAE) addressing
  • Full-system coherency, bringing support for the big.LITTLE architecture
  • NEON unit, for floating-point data and SIMD processing
  • Deeper integer instruction pipeline, with 10–12 stages
  • Full out-of-order execution design with load/store units
  • References

    ARM Cortex-A17 Wikipedia